Alternative processing techniques coupled with new materials have been introduced such as strained Si, High-k metal gate and ultra-low-k dielectric 9 to increase the device performance keeping the power at lower side are discussed in subsequent section.


A. Strained Silicon

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            Strained silicon is a layer of silicon whose atoms interatomic distance is stretched beyond their original distance and used in channel. This is achieved by superimposing the silicon layer on Silicon Germanium (SiGe) substrate. Fig 2 shows the normal silicon vs strained silicon over SiGe. The silicon atoms get aligned with the under lying SiGe atoms which are place little farther apart when compared to Si. This stretched strained silicon atoms interatomic space is increased and hence the interatomic force reduces thereby increasing the easy movement of electrons. This increases the mobility of electrons resulting in better chip performance and lower power consumption 2. These electrons can move 70% faster allowing strained silicon to switch 35% faster 24.

This technique has become an integral part of the International Technology Roadmap for Semiconductors (ITRS), starting at 90nm technology node 24. Strained silicon was implemented in Intel’s 90nm technology in 2003 11. There are two basic approaches to introduce strain into transistor channel: global and local approach. 


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